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An innovative design with simulation results of a low-voltage bulk driven mixer for direct conversion receiver is presented. The circuit is designed in a 65 nm digital CMOS process without analog extensions. It offers a conversion gain of 22 dB at a clock frequency of 1.5 GHz for GALILEO/GPS applications. The design is capable of operating at up to 7 GHz with only 3 dB gain decrease. The simulated...
A highly linear down-conversion mixer in a 65 nm digital CMOS technology is presented. The mixer was fabricated in a tripple-well process which allows to use the bulk of NMOS transistors as inputs. In contrary to other works not the gate but the bulk connector is used for the input signal. A high IIP3 of +18 dBm was achieved with a power consumption of only 0.67 mW from a 1.2 V supply voltage. The...
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