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A mixed-mode ASIC, TIGER (Turin Integrated Gem Electronics for Readout), optimized for the readout of the cylindrical GEM detector of the BESIII experiment is presented. The chip consists of 64 analog front-ends, each featuring a charge-sensitive amplifier followed by a dual-shaper. A low-power TDC and a 10 bit Wilkinson ADC with de-randomizing buffers allow to measure both the time-of-arrival of...
The purpose of this paper is to present a new method and structure for the automatic configuration of a digital system to unknown delays in synchronous input data channels. The method makes possible to restore synchronism in node-to-node communication. Synchronism may be lost due to different delays introduced by the various communication channels. The proposed method allows differences in the channel...
The purpose of this paper is to present a novel built-in Clock Domain Crossing (CDC) test and diagnosis methodology for Globally Asynchronous, Locally Synchronous (GALS) systems. The methodology allows design and prototype validation, low maintenance and repair costs, and production / lifetime at-speed test. Moreover, high resolution diagnosis is obtained, to identify which device(s) and/or communication...
The purpose of this paper is to present a new robust methodology for synchronous communications in a BUS, connecting multi-clock domains. Traditionally, when robust solutions are needed, an asynchronous communication is used. However, the low transfer rates associated with asynchronous solutions make them inadequate for high performance digital systems. On the other hand, synchronous communications...
This paper presents the implementation of the timing, trigger and control (TTC) system of the CMS experiment currently under construction at CERN. The TTC system distributes the system clock for the experiment as well as the first level triggers and synchronization commands. The overall system is described, highlighting the differences from the original concept of the CERN RD-12 collaboration in terms...
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