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This paper presents the first 103.125-Gb/s multilink gearbox (MLG) IC, which facilitates the transport of independent 10- and 40-GbE signals to $4 \times 25.78$ Gb/s physical layers, such as 100GBASE-xR4. The IC consumes only 1.37 W while implementing complicated reverse gearbox functionality. The measured TX jitter from 10- and 25-G lanes is 0.407 and 0.448 psrms, respectively. The measured input...
This paper presents the industry's first low-power 100-Gigabit Ethernet (GbE) multi-link gearbox (MLG) IC, which facilitates transport of independent 10-GbE and 40-GbE signals to 4×25G physical layers implementing 100GBASE-R. The IC consumes only 1.37-W while implementing complicated reverse gearbox functionality. The measured TX jitter from the 25-Gb/s lane is 1.6-psrms, and the recovered clock jitter...
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