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In this paper a 6th order bandpass intermediate filter with a 10% settling time of 70 ns is presented. The filter is optimized to provide a short settling time for operation in a pulsed wake-up receiver. To the best of our knowledge, the presented work provides the fastest turn-on time among comparable designs. Such a fast turn-on behavior is very beneficial for recent wake-up radios as it enables...
To create a fully integrated very low noise amplifier in CMOS technology without excessive power consumption, it is advantageous to combine the benefits of using a highly scaled technology and integrated coils. The low noise amplifier using a feedback transformer for simultaneous noise and impedance matching presented in this paper shows the successful conjunction of these benefits. However the challenge...
This paper presents a 190-GHz direct-conversion receiver capable of supporting higher-order modulation schemes and implemented in a SiGe BiCMOS technology. The circuit consists of a low-noise amplifier, an active fundamental mixer, a LO driver, a variable-gain baseband amplifier and a totem-pole output stage. To exploit the advantages of sub-THz frequencies in terms of available bandwidth at a low...
This paper presents a novel combination of two fully integrated phase-locked loops (PLLs) to control the oscillation frequency and modulation frequency of a switched injection-locked oscillator (SILO). The SILO is used as an active reflector transponder in a frequency-modulated continuous wave (FMCW) radar system. A fractional-N PLL (RF-PLL) with a tri-state phase-frequency detector (TSPFD) sets the...
This paper presents a fully integrated active backscatter transponder for the use in a FMCW radar system for localization of passengers in sea in case of a ship sinking emergency. The active reflector tag is based on a cross-coupled oscillator circuit topology operating as a switched injection-locked oscillator (SILO). The circuit was implemented in a 180nm BiCMOS technology. Measurements resulted...
This paper presents the design and characterization of a fully-differential intermediate frequency (IF) filter based on an operational transconductance amplifier (OTA) with 6th order Butterworth bandpass characteristic. The designed 2-stage BiCMOS OTA can be treated as an operational amplifier (OPAmp) together with its output resistance. The combination exhibits an open-loop voltage gain of 75 dB...
Conventional Doherty power amplifiers need a λ/4 transmission line at the input of the peak amplifier. This provides a 90 degree phase shift of the input signal to allow a phase correct combination at the output. In this paper a discrete Doherty power amplifier for 2GHz LTE band is introduced that comes with a phase shifter at the peak amplifier's input with 110 degree. It shows a 2.5% points higher...
This work presents a fully differential operational amplifier (opamp) design architecture, that achieves a high gain bandwidth at a low power consumption. For verification, the architecture is implemented in a low cost 180 nm bulk CMOS technology. The chip achieves a high gain bandwidth of 2.03 GHz at 55° phase margin with a low power consumption of only 2.25 mW. Of course even better results are...
In this paper continuous time high-performance current mirrors (CMs) based on series and parallel connected unity sized CMOS transistors suitable for low power applications are presented. It is shown that the proposed implementation techniques allow an increased output resistance, from twice the output resistance of the simple current mirror (SCM) up to more than 50 times of the cascode current mirror's...
In this paper, we discuss layout problems encountered in power amplifiers with negative parallel feedback. We show how to reduce the risk of an unstable power amplifier (PA) by careful layouting without the use of additional elements and thus chip area. Optimised vs. non-optimised layouting are compared and verified with fabricated ICs. Finally a PA with large signal bandwidth of 1.9 GHz at a design...
In this paper a detailed investigation of LNA noise using negative transformer feedback matching is performed. It is shown, that the transformer matching technique (TMT) is well suited for full on-chip integration of the necessary inductors and it also enables a low noise figure while conjugate complex matching is performed. To prove the assumption analytical calculations using a simplified VBIC-transistor...
In this paper, a fully integrated Doherty power amplifier (DPA) for application in IEEE 802.11a wireless local area network (WLAN) transmitters is proposed. The DPA exhibits an output power at its 1 dB compression point of 22 dBm with a corresponding power added efficieny (PAE) of 25 %. Within a 6dB-backoff the PAE is still 20 %, which among the highest reported for Doherty amplifiers fully integrated...
A low power Fast Ethernet line driver has been designed in a 180 nm CMOS technology from XFAB. A very low power consumption is achieved with class-B operation. Due to incorporating digital-to-analog conversion to the line driver itself, the power consumption could be further reduced. The power consumption in transmit mode is minimized to 38 mW, which is the lowest one of previous reported line drivers...
In this paper the design of a fully integrated fast switchable cascode low noise amplifier (LNA) for application in wireless wake-up receivers is presented. The circuit contains an integrated balun and a transformer for 50Ω-input-matching. The LNA exhibits a voltage gain of 20dB while only consuming an overall current of 750μA in its on-mode from a 2.5V supply. The measured input return loss is −18dB...
This paper proposes the design of an integrated fast settling analog frontend for application in wireless wake-up receivers. The chip includes a low noise amplifier with matching transformer and integrated balun, a multi-hyperbolic tangent gilbert cell mixer with Sallen-Key filter, a limiting amplifier and a LC-cross coupled digital-controlled oscillator. The chain exhibits a measured conversion gain...
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