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In this paper, we present integer and fractional motion estimation IP for H.264/AVC encoder by hardware-oriented algorithm. In integer motion engine, the reference block is used to share for consecutive current macro blocks in parallel processing which exploits data reusability and reduces off-chip bandwidth. In fractional motion engine, instead of two-step sequential refinement, half and quarter...
Fractional motion estimation always takes much processing time because of variety of motion vectors and two-step sequential half-quarter pel. In this paper, we propose the architecture of fractional engine in fully parallel manner. Instead of sequential processing two-step of half-quarter refinement, integer-half-quarter pel is processed in parallel manner in order to double the speed as well as the...
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