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Helium-3 ion irradiation technique is proposed to improve silicon substrate noise isolation by creating a local semi-insulated region with a resistivity over 1kΩ-cm in low-resistive silicon substrate. Noise isolation is improved about 10dB at 2GHz after helium-3 ion irradiation in a 180-nm CMOS process. A 90% noise reduction has been achieved in the measurement results for test structures with guard...
A helium-3 ion bombardment technique is proposed to realize high-$Q$ inductors by creating locally semi-insulating substrate areas. A dose of $1.0\times 10^{13}$ cm$^{-2}$ helium-3 increases a Si substrate resistivity from 4 $\Omega \cdot $ cm to above 1 $\text{k}\Omega \cdot $ cm, which improves the quality factor of a 2-nH inductor with a 140-$\mu \text{m}$ diameter by 38% ($Q=16.3$ ...
A 60-GHz CMOS on-chip dipole antenna with efficiency-enhancement technique is presented. A helium-3 ion irradiation process is used to reduce the substrate losses of the on-chip antenna. The radiation efficiency of the antenna is doubled using the ion implantation technique. The antenna is fabricated in a 65-nm CMOS technology with a core area of 0.48 mm2. The on-chip antenna achieves a peak gain...
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