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This paper provides quantitative analysis on system efficiency and battery temperature rise in battery-alone system, passive, battery semiactive, and capacitor semiactive hybrid energy storage systems (HESSs). First the system efficiencies and the temperature rises in battery are derived under a pulsed load profile and the four different topologies. Sensitivity analysis is then performed to investigate...
A temperature to digital converter (TDC) that does not require either a reference generator or an ADC and that exhibits low supply sensitivity, small die area, and low power consumption is introduced. A prototype circuit designed to support power management applications over the [60 °C, 90 °C] temperature range was implemented in an IBM 0.13μm CMOS process with a 1.2V power supply for use as either...
An accurate, small, low-power CMOS temperature sensor for on-chip thermal monitoring is proposed. The temperature sensor utilizes the temperature characteristics of the threshold voltage of a MOS transistor to sense temperature and is quite linear over the in temperature range (−20C, 100°C). The threshold-based temperature sensors were designed in the ON Semiconductor 1P6M (Single Poly, 6 Metal) 180nm...
A new approach for identifying the number of stable equilibrium points in supply-insensitive bias generators, references, and temperature sensors based upon self-stabilized feedback loops is introduced. This provides a simple and practical method for determining if these circuits require a “start-up” circuit and, if needed, for verifying that the startup circuit is effective at eliminating undesired...
A new on-die temperature sensor that operates at low supply voltages and exhibits low process sensitivity and good linearity over a wide temperature range is introduced. When compared to conventional structures which have limited supply voltage headroom at the slow-n process corner, the new structures have sufficient headroom to practically operate well over all process corners. When implemented in...
This paper proposes a CMOS structure as a highly linear on-chip temperature sensor. As long as all transistors are in saturation, the output of the structure is a VDD independent voltage source that linearly expresses CMOS threshold voltage, and hence is approximately linear in temperature. A new sizing strategy is introduced following a combined analytical and numerical optimization approach, which...
This work focuses on a new compact 6-transistor CMOS temperature sensor with improved flexibility for achieving target temperature linearity with small die area and low power consumption. The temperature information is provided in a differential output voltage that is based upon the linear dependence of threshold voltage on temperature. Implemented in a 0.18μm process, simulation results indicate...
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