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We report a study of power supply reduction to near-threshold for an 8-transistor CNTFET SRAM cell. Voltage at near-threshold has an impact on delays, energy, energy-delay product, leakage current, and static noise margin. In addition, we have incorporated a removed metallic CNT approach to deal with non-semiconductor CNTs. In this study we investigate how to enhance SRAM performance by means of two...
A metallic CNT renders a short circuit between drain and source in a CNTFET. Technologies capable of removing metallic CNTs create open circuits which degrades SRAM cell performance and functionality. In this paper we present a design approach to tolerate removed metallic CNT in CNTFET SRAM. –x00D7; CNTs to form a CNTFET. An extremely high probability of having a functional memory array can be obtained...
A study of an eight-transistor (8-T) SRAM cell and its implementation in carbon nanotube FET (CNTFET) technology is presented. CNTFETs have shown great potential as post-silicon CMOS technology due to their superior transport properties, improved current density and excellent robustness to process, voltage and temperature variations. HSPICE simulations demonstrate great advantages for this cell design...
In this study we present a metallic carbon nanotube (CNT) tolerant CNTFET memory. The proposed scheme includes a number of uncorrelated (independent) CNTs in series to form CNTFETs provides tolerance to metallic CNTs. To increase driving capabilities parallel (correlated) transistors are used. In addition spare columns are used to increase the memory array yield. An extremely high probability of having...
In this paper three carbon nanotube FET based static memory cells are compared on read and write delays, energy consumption, and performance under diameter variation corners. The carbon nanotube FET is currently considered to be the possible ldquobeyond CMOSrdquo device due to its1-D transport properties that include low carrier scattering and ballistic transport. The memory cells are classified by...
The computing power of microprocessors has exponentially increased in the past few decades, so the support to compute intensive multimedia applications has increased too. With such improved computing power, memory subsystem deficiency becomes the major barrier to support video decoder on the Digital Signal Processor (DSP). H.264/AVC becomes the next generation of video codec for embedded systems....
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