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This paper develops a novel reconfigurable architecture, CMOS-nanorelay FPGA (cFPGA) by integrating carbon nanorelays with CMOS devices to function as FPGA components. cFPGA is a highly efficient architecture, providing 2X density and standby power improvement along with a 30% dynamic power reduction as compared with solely CMOS FPGA circuits. This performance improvement is achieved by using 2T1N...
This paper introduces a novel CMOS-memristor hybrid reconfigurable architecture, mFPGA. Different from the existing crossbar-based CMOS-memristor architectures, mFPGA mainly consists of lTlM-like structures that can be fabricated by using a CMOS-compatible process. These devices can efficiently establish FPGA block memories. More importantly, novel CMOS-memristor routing switches are developed to...
In this paper, a novel reconfigurable architecture, cFPGA (CMOS-Nanorelay FPGA) is developed by integrating carbon nanorelays and CMOS devices to function as FPGA components. cFPGA is a highly efficient architecture, providing 2?? density and standby power improvement along with 30% dynamic power reduction as compared to the CMOS FPGA circuits. This performance improvement is achieved by using 2T1N...
CMOS molecular (CMOL) circuits promise great opportunities for future hybrid nanoscale IC implementation. In this paper, a novel three dimension (3D) architecture of CMOL circuit is introduced. It eliminates the special pin requirement, enabling feasible fabrication. It also doubles the density of nanowires of the original CMOL circuit, while providing similar operation performance. This work significantly...
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