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We report an ultra-low power 100Gbps silicon photonic WDM transmitter tunable with off-chip laser sources. The hybrid CMOS transmitter consists of eight 12.6Gbps WDM channels and consumes a total on-chip power of 33mW.
We propose and demonstrate an AC-power-signal-biased light-emitting-diode (LED) modulation. To minimize the signal distortion, the message signal is up-converted to a carrier of 400 KHz and 60 Hz AC-power signal are combined using our developed bias tee circuit. Measurement result shows a bit error rate (BER) below 10−8 at a transmission distance of 2 m. This technique is energy-efficient and compatible...
In this work, an experimental time division duplex system is presented to prevent interference in visible light communication. The 40-LED array and a single LED were used for downlink and uplink respectively. The interference of signal reflection on mirrors was discussed and removed using time division duplex. At the distance of 2 m, the data rate achieved is above 1Mbps with bit error rate below...
We propose and demonstrate using signal pre-distortion and equalization schemes for increasing the data rate of the white-light LED communication system. Bit-error-rate of <;10-10 at 10-Mb/s operation was achieve using 1-MHz bandwidth white-light LED.
The talk will present the design of a silicon microsystem that utilizes photonic interconnects to enable a highly compact supercomputer-scale system. Recent progress in dense, wavelength-division multiplexed, low-power silicon photonic interconnect components will be reviewed.
First we discuss market opportunities for 40 Gb/s systems. Next we discuss practical requirements that 40 Gb/s systems must meet to become commercially deployed. Finally, we discuss the trade-off between the achievable transmission distance and the complexity/cost of transponders and line systems.
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