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Through silicon via (TSV) is regarded as one of the most advanced packaging technologies, however, many serious reliability issues need to be paid more concerns. The Cu pumping effect is one of the most crucial reliability problems. Due to different coefficient of thermal expansion for different packaging materials, Cu-TSV can deform and damage the wiring redistribution layers and degrade the reliability...
Though Silicon Vias(TSVs) are regarded as a key technology to achieve three dimensional(3D) integrated circuit(IC) functionality. Annealing a silicon device with TSVs may cause high stress and cause TSV protrusion because of high Coefficient of Thermal Expansion(CTE) between silicon substrate and TSVs. The TSV wafers could be annealed right after copper plating process, or after chemical mechanical...
Though Silicon Vias(TSVs) are regarded as a key technology to achieve three dimensional(3D) integrated circuit(IC) functionality. Annealing a silicon device with TSVs may cause high stress and cause TSV protrusion because of high Coefficient of Thermal Expansion(CTE) between silicon substrate and TSVs. The TSV wafers could be annealed right after copper plating process, or after chemical mechanical...
Through silicon vias (TSVs) are regarded as one of the key enabling component to achieve three-dimensional (3D) integrated circuit (IC) functionality. In this paper, we present the investigation on TSV protrusion and stress at different annealing conditions tested by means of optical profiler and high efficiency micro-Raman microscopy. Finite element method is utilized to model and simulate the thermo-mechanical...
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