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The continued down-scaling of complementary metal-oxide-semiconductor (CMOS) devices requires replacement of the conventional Si dioxide or oxynitride dielectric by alternative high-k materials immediately. For long term consideration, electron devices may be replaced by spintronic devices which make use of both charge and spin, two fundamental properties of electron. However, to realize these, many...
In this paper, we present our vision of a highly scalable arrayed biochemical sensor platform. This platform combines the advantages of refined and entrenched technologies like top-down integrated circuit fabrication and clinical assays with emerging technologies like three-dimensional stacking and label-free sensing. We demonstrate fabrication concepts and preliminary sensing results on ovarian cell...
In this paper, we present the investigation of inverse narrow width effect (INWE) of 65 nm low-power process with dual gate oxide shapes. To evaluate the impact of STI process on narrow devices, we conducted different experiments in STI process steps, including STI liner, STI elevation, STI liner annealing and STI nitride pullback. The result shows only STI liner annealing and STI nitride pullback...
Sets of Pairs of Functions to be Distinguished (SPFD) is a functional flexibility representation method that was recently introduced in the logic synthesis domain, and promises superiority in exploring the flexibility offered by a design over all previous representation methods. In this work, we illustrate how the SPFD of a particular wire reveals information regarding the number of potential transient...
An electrical and physical design power optimization methodology and design techniques developed to create an ARM 1136SF-S microprocessor in 9Onm standard CMOS are presented. A 40% reduction in power dissipation has been achieved while maintaining a 355 MHz operating clock rate under typical conditions. Functional and electrical design requirements were achieved with the first silicon
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