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We propose an asymmetric write algorithm of step-down set/step-up reset without verify for the first time. The demonstration is carried out on a 128Kb test macro of AlOx/WOx bi-layer ReRAM fabricated based on 0.18µm logic process. The set and reset energy per bit are reduced by 34% and 20% respectively. The set and reset access time decrease by 54% and 32% respectively. The mean value of endurance...
We propose and demonstrate a dynamic self-adaptive write method (DSWM) for the first time, which fixes the reliability problem that over-set or over-reset degrades ReRAM endurance and retention of tail bits significantly. The demonstration is carried out on a 128Kb test macro of AlOx/WOx bi-layer ReRAM fabricated based on 0.18µm standard logic Al interconnect. Results show that the mean value of endurance...
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