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This paper presents an 18-to-23 GHz sub-harmonically injection-locked all-digital PLL (SIL-ADPLL). It adopts the proposed injection-locked frequency divider aided adaptive injection timing alignment technique and uses a proposed (UP-DN) block to adjust the injection timing adaptively at output frequency higher than 20 GHz with low power consumption. A new pulse generator is proposed to relax the trade-off...
This paper proposes a wideband subharmonically injection-locked PLL (SILPLL) with adaptive injection timing alignment technique. The SILPLL includes three main circuit blocks: one-oscillator-period constant-delay (OOPCD) divider, timing-adjusted phase detector (TPD), and pulse generator (PG). The proposed injection timing alignment technique can align the injection timing adaptively in a wide range...
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