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Iterative image reconstruction takes relatively long computing time limiting applications of capacitance tomography in high speed processes. A hardware/software co-design approach to accelerate the Landweber algorithm described in this paper. Due to considerable logic and embedded multipliers resources in FPGA devices, time consuming operations can be realized concurrently. This paper also consider...
W artykule opisano konstrukcję jednokanałowego tomografu pojemnościowego. Jego modułowa budowa umożliwia testowanie różnych układów pomiarowych. W tomografie zastosowano układ pomiarowy wykorzystujący przetwornik CDC (Capacitance-to-Digital Converter). Jako układ sterowania zastosowano układ FPGA, w którym zrealizowano system mikroprocesorowy wraz z układem sprzętowej rekonstrukcji obrazów. Układ...
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