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To achieve better and faster material discrimination in applications like security inspection, X-Ray image sensors giving a highly resolved energy spectrum per pixel are required. In this paper, a new pixel architecture for spectral imaging is presented, exhibiting a 256 bin spectrum per pixel in a single image duration, up to two orders of magnitude higher than previous works. A prototype circuit,...
This paper presents a study on photodiodes dedicated to image sensors which merge imaging and harvesting capabilities. This study has led to a VerilogA model of photodiodes dependent on the properties of the CMOS process, photodiodes geometry and illumination. Such model will be useful to make predictions on the behavior of new architectures of photodiodes used in CMOS image sensors embedding harvesting...
In a high-speed digital X-ray imager, each pixel in the matrix needs an analogue-to-digital converter (ADC) in order to assess the energy of the randomly incoming photons. The analogue-to-digital (AD) conversion rate is thus highly dependent on the photon flux parameters, i.e. its mean and its standard deviation. In classic designs, this rate is often set to ten times the maximum photon flux mean,...
In this paper is presented a High Dynamic Range (HDR) extension technique that applies to an imager without modifying any of its other specifications (as speed, noise floor or pixel scheme). The technique relies on the division of the focal plane into blocks that are able to choose the integration time from a set of eleven exposures, reaching +60db extension compared to a standard CMOS imager. The...
Some smart imagers embed image processing operations or Compressive Sensing at the focal plane level. This process introduces artifacts due to technology dispersion and unpredictable behaviors. This article presents a generic algorithm structure well suited for compensating block artifacts by appropriate post processing operations. The proposed restoration method is composed by a three steps loop:...
This paper presents the evolutions of CMOS image sensors. From the early works, highly image processing oriented, the main research effort has then emphasized on image acquisition. To overcome the rising limitations of standard approaches and to promote new functionalities, several research directions are underway with promising results.
An image compressing technique for High Dynamic Range (HDR) image sensors is introduced. Compression is performed in two steps: Pixel value coding optimization followed by DCT-based (Discrete Cosine Transform) compression. A floating point coding technique is first used with a common exponent shared between pixels of the same block, and then a DCT is applied to each group of pixels. This new concept,...
A 16 channel front-end IC dedicated to small animal positron emission tomography has been developed for cross-strip CdTe detectors. Each channel, designed to handle up to 20 pF detector capacitance, includes both low voltage (2 nV/Hz1/2) and low current (40 fA/Hz1/2) noise, high bandwidth (50 MHz at 20 pF detector capacitance) current amplifier with a gain of 100 for a power consumption of 4.7 mW...
In this paper, we present two circuits designed for pulse readout of a semiconductor PET system: a fast low noise low power front-end preamplifier/shaper, and a processing circuit performing time tagging, energy measurement and digital interfacing with the data acquisition system. Considerations on noise, speed and power consumption are discussed.
A pixel-level ADC technique for CMOS image sensors is presented. As the charge represents accurately the amount of illumination, the principle consists in counting small charge packets which come from the detector. Based on a 0.13 mum CMOS technology, simulation results and first measurements are presented showing that the LSB value can be reduced to 1900 electrons with a static power of 250 nW per...
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